Exactor LPU Connected — Online

High-Complexity Boolean Logic Minimization

Scale logic synthesis up to 64 variables where traditional heuristic algorithms fail — using non-monotonic XOR lattice inference for exact, production-ready results.

Open Web Console Explore API
exactor-console — simplify.xor
INPUT — SOP Expression (18 vars)
minimize(
  expr: "AB'CD+A'BCD'+ABC'D+...",
  vars: 18,
  target: "ESOP",
  minterms: 4096
)

// Standard tools: timeout after 30s
// Exactor: 1.2s · linear O(n)
OUTPUT — Minimized ESOP Form
result: "A⊕BC'D⊕ABD'"
gates: 3 (was 14)
reduction: "78.6%"
format: "Verilog RTL"
time_ms: 1200

// Export ready: Vivado / Quartus
synthesis_certified: true
VARIABLES 18 / 64
GATE REDUCTION 78.6%
SOLVE TIME 1.2s
ALGORITHM O(n) XOR
STATUS CERTIFIED ✓

Traditional Tools Hit a Wall

Standard EDA algorithms collapse exponentially. Exactor uses geometry.

⚠ Traditional SOP

The O(2ⁿ) Bottleneck

Standard EDA tools (Espresso, ABC) rely on SOP coverage, causing combinatorial explosion in high-entropy arithmetic logic.

  • Exponential complexity beyond 16 variables
  • Heuristic — no guarantee of minimality
  • XOR-intensive circuits remain bloated
  • Timeouts on real-world arithmetic blocks
  • No native ESOP output format
VS
✓ Exactor ESOP

Geometric Inference

Logic is mapped to a multidimensional XOR network to identify diagonal symmetries — bypassing brute force entirely.

  • Linear O(n) — scales to 64 variables
  • Exact minimization, not heuristic
  • Native XOR/XNOR lattice support
  • Solves in seconds, not minutes
  • Certified Verilog / VHDL output

Built for Precision Engineering

Every layer of Exactor is designed around one principle: exact results, at scale.

Up to 64 Variables

Handle logic functions with unprecedented variable counts using the XOR lattice inference engine — impossible for traditional SOP tools.

🎯

Exact Minimization

Unlike Espresso and syntactic heuristics, Exactor guarantees the minimum number of product terms. No approximations.

🔷

Native ESOP Output

First-class support for Exclusive-Sum-of-Products, the optimal representation for XOR-intensive arithmetic blocks.

🔌

FPGA Native

Output maps directly to LUT-6 configurations in Xilinx Vivado and Intel Quartus with a certified synthesis path.

🤖

AI-Assisted Inference

AI credits can guide the solver on complex arithmetic constraints, reducing manual iteration on non-trivial blocks.

🔗

REST API & SDK

Integrate Exactor directly into your EDA pipeline. Full programmatic access via API keys with SU-based metering.

Optimized RTL Ready for Production

Drop synthesized output directly into your existing toolchain — no manual translation needed.

COMPATIBLE WITH
↓30%
avg. silicon footprint
reduction

Start Free. Scale Exactly.

All plans include access to the Web Console. Upgrade for higher variable limits, API access, and RTL export.

Starter
$0 / forever
For students, researchers, and explorers testing boolean logic minimization concepts.
  • Minterms: up to 512
  • Variables: up to 16
  • Export: Browser display only
  • AI Credits: None
  • Web Console access
  • Community Discord
Open Console
Ascent
Custom
For teams, semiconductor companies, and advanced synthesis pipelines requiring maximum capacity.
  • Minterms: Unlimited
  • Variables: up to 64
  • Export: All formats + custom
  • AI Credits: Unlimited
  • Full API + webhook integrations
  • Marketplace: publish & sell
  • SLA + dedicated support
  • On-premise deployment option
Contact Sales